English Version is Trial!

کاربران فارسی زبان لطفا به بخش فارسی مراجعه نمایند.

سیویلیکا به زبان فارسی

Advanced Search

Title
Author
(Last name)
Abstract
Keywords

About CIVILICA®

CIVILICA® provides professional papers published in national and international conferences.

This site is registered for BoomSazeh Construction Technology Development Co.

 

Contact Us:

Tel: 021-88008044

Email: Info [at]  CIVILICA [dot] com

 

 
Home Page E-mail us to: Info @ CIVILICA . com Tel: +98-21-88008044

ISSN 1735-5540   

 

Quick Search in Title, Abstract, and Keywords of Papers

Showing Abstract of An Efficient Field Programmable Gate Arrays Placement by Particle Swarm Optimization

 
Links

[ Bug Reporting | Back | See this Article in Persian CIVILICA ]

Paper Details

[ Downloads: 1 | Abstract Viewed: 954 | Pages: 5 ]

Title

An Efficient Field Programmable Gate Arrays Placement by Particle Swarm Optimization

Topic: الكترونيك Published Year: 1388
Presentation:
Published in:

[ 12th Iranian Student Conference on Electrical Engineering ]

Original Language: English Full Text Size: Not Available

 

Abstract of the Article

 

Note: English CIVILICA is in its Trial Period so Full Texts can not be provided! Persian users can download it here

Download This article in PDF format An Efficient Field Programmable Gate Arrays Placement by Particle Swarm Optimization

 

Authors:

[ Ali Naderi ] - Semnan university
[ Parviz Keshavarzi ] - Semnan university
[ Hassan R. Soleymanpour ] - Semnan university

 

Abstract:

The Field Programmable Gate Arrays (FPGAs) are becoming increasingly important platforms for digital circuits. The optimum placement problem in FPGAs is crucial to achieve. This paper uses the particle swarm optimization (PSO) for solving the placement problem and adjusts its parameters for driving an optimal solution which is comparable with similar solutions. The proposed method results have been compared with Simulated annealing (SA) algorithm and previous PSO solution. The results of applying this algorithm on two digital circuits, a 4 bit ALU and a BCD counter, show the feasibility and efficiency of the proposed algorithm

 

Keywords:

Particle Swarm Optimization, FPGA,Placement, Simulated Annealing.

 

CIVILICA® - © BoomSazeh Construction Technology Development Co.

SAVAFA