Automatic Design and Optimization ofLow-power CMOS Digital Integrated CircuitsUsing Multi-objective Genetic algorithm

In this paper, an automated design algorithm for transistor sizing of CMOS digital integrated circuits based on Genetic Algorithm (GA) is presented. The design algorithm is implemented in MATLAB while circuit simulations are done in HSPICE using CMOS 50nm technology parameters. In order to optimize both objectives (power consumption and propagation delay) the Pareto multi-objective solution approach is used. However, as it is shown in the paper, simulation results obtained from HSPICE are in a very good agreement with MATLAB analytical results which justifies the good accuracy and performance of the proposed design algorithm.

کلیدواژه ها:

Genetic Algorithm ، VLSI ، Digital IntegratedCircuits ، Propagation delay ، Power consumption ، CMOS