A Compact Design of Multiplicative Masked AES S-Box  Fulltext 

[ Babak Zakeri ] - School of Electrical Engineering, 2 Department of Computer Engineering, 3 Electronic Research Center
[ Mahmoud Salmasizadeh ] - School of Electrical Engineering, 2 Department of Computer Engineering, 3 Electronic Research Center، Electronic Research CenterSharif University of Technology, Tehran, Iran
[ Moradi Amir ] - Department of Computer Engineering
[ Mahmoud Tabandeh ] - School of Electrical Engineering

خلاصه مقاله:

Composite Field Arithmetic is known as an alternative method for lookup tables in the implementation of S-box block of AES algorithm. The idea is to breakdown the computations to lower order fields and to compute the multiplications and inverse there. Since in lower order fields these computations are much easier, the use of composite fields yields to noticeable reduction of area. The most compact design using this technique is presented by Canright using only 92 gates for an S-box block. On the other hand multiplicative masking, as a masking method for AES S-box implementation, is area consuming. Our work in this paper is to use Canright’s idea to design a compact multiplicative masked AES S-box. We use mapping and functions used in that design and define some new functions based on it and we change the known multiplicative masking method in a way that uses our functions. The results are then compared with an ordinary implementation, and it is shown that our design is noticeably smaller (23% reduction in the required area).

AES, S-Box, Composite Field Arithmetic