A Low-Power and Low-Energy 1-Bit Full Adder Cell Using 32nm CNFET Technology Node

Full adder cell is often placed in the critical path of other circuits. Therefore itplays an important role in determining the entire performance of digital system.Moreover, portable electronic systems rely on battery and low- power design isanother concern. In conclusion it is a vital task to design high-performance and low-power full adder cells. Since delay opposes against power consumption, we focus onPower-Delay Product (PDP) as a figure of merit. In this paper using carbonnanotube field-effect transistors (CNFETs) A novel low power and low PDP 1-bitfull adder cell is proposed. The novel cell is based on capacitive threshold logic(CTL) and to strengthen its internal signals transmission gates (TGs) are applied.Using both CTL and TG techniques lead to achieving low power consumption fulladder cell. Intensive simulations with 32 nm technology node using SynopsysHSPICE with regard to different power supplies, temperatures, output loads, andoperating frequencies are performed. All simulations confirm the superiority of theproposed cell compared to other state- of- the-art cells.

کلیدواژه ها:

Nanoelectronics ، Carbon Nanotube Field-Effect Transistor (CNFET) ، Full Adder ، Low Power ، Low Energy