Shahabi - CAD Laboratory, School of Electrical and Computer Engineering, University of Tehran, Tehran, IRAN
Honarmand - CAD Laboratory, School of Electrical and Computer Engineering, University of Tehran, Tehran, IRAN
Navabi - CAD Laboratory, School of Electrical and Computer Engineering, University of Tehran, Tehran, IRAN

The Decreasing manufacturing yield of integrated circuits, as a result of rising complexity and decreased feature size, and the emergence of NoCbased design techniques, has necessitated the search for network reconjguration techniques for reusing NoCs with faulty communication hardware. In this paper, we propose a method to cope with the problem of faulty ports in NoCs with mesh topology. The method is based on the use of reconJigurable routing tables in network switches. We investigate this technique for a conventional routing mechanism and our optimized routing approach. The conventional mechanism uses one entry in its routing table for eveiy destination address while our proposed routing mechanism uses ajxed number of entries per table and routes based on the address value comparison of the current switch and the destination switch. Experimental results show that a network reconzred for fault masking by programming its routing tables has acceptable but degraded performance parameters as compared to the original, non-faulty network.

Degradability, Network on Chip, Programmable Routing Table