Seyedhe Rahil Fatemi - Student of faculty of engineering, Shahrekord University, Shahrekord , Iran
Noushin Ghaderi - Assistant Professor of faculty of engineering, Shahrekord University, Shahrekord,
Majid Ebneali Heidari - Assistant Professor of faculty of engineering, Shahrekord University, Shahrekord, Iran

This paper proposes a new multi level of amplitude modulation and pulse width modulation structure for a 7Gb/s serial link transmitter. This scheme can be implemented in 0.18µm CMOS technology. This technique transmits 7 bit data in a symbol time. Therefore the symbol rate is reduced, while the minimum pulse width (PW) is increased. İn the proposed circuits, the PW is larger than Tb(a conventional NRZ data PW). So the ISI will be improved. The multiphases output of a five stage ring oscillator VCO in the PLL is used to modulate the signal. In PAM modulator block, a current-mode technique is used to increase the rate of data transmission. Serialization of parallel data is down by a current-mode multiplexer. PWAM modulator ,which consists of a PWM modulator and a PAM modulator, consumes 68.2mW. With 1.8v power supply, the peak to peak jitter at the PWAM output is 20Ps.

Active inductor, serial link, PWM(Pulse Width Modulation), PAM(Pulse Amplitude Modulation),current-mode circuts