Novel Approach for System Level V oltageS cheduling Technique

In this paper , we present optimized merhodotost for Intralask voltage scheduling. Our proposed method gets data flow and control flow of application that represents colorqtion between dffirent parts of the application at the early stage of design using UML-RT model and decides to schedule processor's voltage. By applying this technique on JPEG encoder system experimental results show reduction in energl consumplion by 18-54 % over comrnon Inlra'DVS algorithm.