Reliability Analysis of Logic Circuits Using Binary Probabilistic Transfer Matrix
محل انتشار: بیست و یکمین کنفرانس مهندسی برق ایران
سال انتشار: 1392
نوع سند: مقاله کنفرانسی
زبان: انگلیسی
مشاهده: 1,112
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شناسه ملی سند علمی:
ICEE21_419
تاریخ نمایه سازی: 27 مرداد 1392
چکیده مقاله:
Technology scales strongly increased the sensitivity of new integrated logic circuits to transient faults. Since the reliability of combinational circuit is an important factor indigital circuits design, so, a fast method to obtain accurate value of reliability becomes a main challenge. The main sourceof inaccuracy and scalability problems in existing methods is the presence of reconverging signals. In this paper a new library-based method is proposed to calculate the circuitreliability in which the effects of nested reconvergent paths is considered easily. So a binary probability matrix is used toresolve signals correlation problem. Simulation results show that our proposed method gives accurate reliability value with less complexity than previous methods.
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نویسندگان
Hamed Zandevakili
Department of Electrical Engineering, Shahid Bahonar University, Kerman, Iran